NIOSII addressing for 32 bit wide SDRAM

For the output above where the address just increments four or eight bytes at a time:

this is output from the function ddr_test_fulldata() so test_addr = 8*i

(ie. 0x0,0x8,0x10,0x18, etc) which matches the 8x address incrementing above

for ddr_test_fulldata().

For test_addr = 8 * (1 << i); we have 1 shifting left i times and then multiply by 8

(ie. 0x8, 0x10,0x20,0x40, etc).

>>>Your 'test_addr' goes 1, 2, 4, 8, 16, 32, 64, 128 ,etc...

I am not sure where this is coming from. :(

The output was:

1: wrote 00000001, test_addr 00000000, read_val 00000001, device 0

2: wrote 00000002, test_addr 00000008, read_val 00000002, device 0

3: wrote 00000004, test_addr 00000010, read_val 00000004, device 0

4: wrote 00000008, test_addr 00000018, read_val 00000008, device 0

5: wrote 00000010, test_addr 00000020, read_val 00000010, device 0

yadda, yadda.

Perhaps my awkward reporting order/style of: wrote_val:test_addr:read_val

is confusing. ie. test_addr is not the first column(it is the middle column).

Sorry if I have not been clear.