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Altera_Forum
Honored Contributor
Honored ContributorNiosII - DSPBuilder Interface
Does anybody has a idea about tieing up a hw-design, created by DSPBuilder, to NiosII?
I inserted it to my existing SOPC-Design and it appears in "system.h" as a regular device description. Then i tried to treat it as the UART, with a filedescriptor, but this is the wrong way because the driver for this "device" does not support "fopen","fdopen","open" or something like that. How can i talk through NiosII with my DSP-Builder-Design? i´ll be thankful for any input... //edit: seems to be sth like "custom instruction"?3 Replies
Altera_ForumThere is a reference design on tool design flow: Integrating DSP Builder design into SOPC builder.
Here is the link: http://www.altera.com/end-markets/refdesig...-detection.html (http://www.altera.com/end-markets/refdesigns/sys-sol/indust_mil/ref-edge-detection.html) Hope it helps!- Altera_Forum
Hello,
Im looking to do something like that, but without using DSP Builder. Instead Id like to come up with my own custom FPGA design, and be able to send that data into linux, and then from there send it out via Ethernet. Are there any examples for this as well, or site that could help get somthing like this running? I am pretty new to getting the linux part, but as far as basic FPGA programming, ive done it before a few times. Im currently using the Nios 2 Evaluation kit, if that helps any. Thank you for your time, -Mark - Altera_Forum
Thanks for the input!
I´ve been on altera.com before posting, now i do sth. similar: the interface to the dspb-design is a dual-port-ram. nice weekend!
