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Altera_Forum's avatar
Altera_Forum
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12 years ago

Nios2 memory mapped slave - addressing issue

Dear community,

I need your help. I implemented an component -> a wrapper for a single-port ram with a 32-bit width for each memory cell. I am trying to understand the addressing schema. In C I am using the following code 

for(int i = 0; i < length; i+=1)
    {
        temp = temp | (((alt_u8)CURRENT_BYTE) << 24);
        read_byte();
        temp = temp | (((alt_u8)CURRENT_BYTE) << 16);
        read_byte();
        temp = temp | (((alt_u8)CURRENT_BYTE) << 8);
        read_byte();
        temp = temp | ((alt_u8)CURRENT_BYTE);
        read_byte();
        IOWR_32DIRECT(storagePtr, i, temp);
        temp = 0;
    }

But after reading a few times back with the following code: 


for(int i = 0; i < 80; i+=4)
        {
        printf("address: %x; readback: %x\n", i, IORD_32DIRECT(storagePtr, i));
        }

the pattern is changing after 4 calls, but it should change after each call! In my component I'm shifting the address I'm getting from nios2 by 2 (in order to devide by 4).

Can anybody explain the addressing schema?

Thx.

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    The _32DIRECT macros use byte adressing, so IORD_32DIRECT(storagePtr,0),IORD_32DIRECT(storagePtr,1),IORD_32DIRECT(storagePtr,2),IORD_32DIRECT(storagePtr,3) will in fact return the same value, the word at register number 0 on your component. IORD_32DIRECT(storagePtr,4) will return register number 1, etc... The same works for IOWR_32DIRECT

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Probably caused by the data cache.

    You either need to use the 'iord' family of instructions that bypass the data cache or set the top bit of the address (which has the same effect).

    Youshould also make your slave have a 32bit data bus - even if you ignore the high 24bit on writes and set them to zero on reads.

    If you have an 8-bit slave the Avalon fabric will contain a 'bus width adapter' than converts the 32bit requests from the nios (or other avalon master) into four 8bit requests to your slave. The bus width adapter does assert the byte enable appropriately, but the nios always asserts all byte enables for reads.

    The Avalon fabric really ought to offer you the choice of including the bus width adapter (appropriate for memory slaves) or ignoring the high bits (appropriate for many io devices).