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Altera_Forum
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13 years ago

Nios2 and external Microcontroller together access a SDRAM

Hi all, My system consists of a microcontroller (TI Concerto Cortex M3) and a FPGA (altera cyclon IV E) and a SDRAM. The microcontroller connects only with FPGA(Address / data / control ...
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Altera_Forum
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13 years ago

Hi Socrates,

many thanks for your reply!:-)

My Nios2 runs at 75Mhz, but this is not fixed.

Is there an other solution besides the Avalon MM Master for me? Cant i tell the Qsys, let Nios2 higher priority, so that the Microcontroller must wait until ther Nios2 is done with SDR-SDRAM?

thanks in advance!

Tomy

ps. sorry for my english!:(