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dim1's avatar
dim1
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5 days ago
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NIOS V/g - peripherals under 2GB Peripheral Region

Hello,

I am trying to clarify the information provided in the following KB:

Why are the peripherals under 2gb peripheral region still cached by the NIOS V/g

Does the above KB recommends to have non-cacheable peripheral regions above the 2GB address - that is, non-cacheable space starts from address 0x80000000, or any address above that?

Thank you,

D.

  • Hi dim1​ 

    KDB recommends to have non-cacheable peripheral regions above the 2GB address

    This statement is incorrect. (However, we agree that the KDB needs better clarity, and it will be improved soon.)
    The KDB is referring to the remaining Size available. Not the Base Address.

    Excluding 2GB, Nios V/g processor still offers from 64KB to 1GB, or None.

    In short, the issue is affecting Peripheral Regions that is configured with 2GB Size, regardless of the Base Address.
    Take 4 designs as examples,

    • Design 1
    • 0x0 to 0xFFFF in 64KB Peripheral Region A will bypass cache.
    • 0x4000_0000 to 0x7FFF_FFFF in 1GB Peripheral Region B will bypass cache.

     

    • Design 2
    • 0x0 to 0x7FFF_FFFF in 2GB Peripheral Region A will NOT bypass cache. 2GB Size is bugged.
    • 0x8000_0000 to 0xBFFF_FFFF in 1GB Peripheral Region B will bypass cache.

     

    • Design 3
    • 0x4000_0000 to 0x7FFF_FFFF in 1GB Peripheral Region B will bypass cache.
    • 0x8000_0000 to 0xFFFF_FFFF in 2GB Peripheral Region B will NOT bypass cache. 2GB Size is bugged.

     

    • Design 4
    • 0x0 to 0x7FFF_FFFF in 2GB Peripheral Region A will NOT bypass cache. 2GB Size is bugged.
    • 0x8000_0000 to 0xFFFF_FFFF in 2GB Peripheral Region B will NOT bypass cache. 2GB Size is bugged.

     

    Regards,
    Liang Yu 

2 Replies

  • dim1's avatar
    dim1
    Icon for New Contributor rankNew Contributor

    Hello Liang Yu,

    Thank you for your detailed response. This answers my question.

    Best regards,

    D.

  • LiangYuG_Altera's avatar
    LiangYuG_Altera
    Icon for Occasional Contributor rankOccasional Contributor

    Hi dim1​ 

    KDB recommends to have non-cacheable peripheral regions above the 2GB address

    This statement is incorrect. (However, we agree that the KDB needs better clarity, and it will be improved soon.)
    The KDB is referring to the remaining Size available. Not the Base Address.

    Excluding 2GB, Nios V/g processor still offers from 64KB to 1GB, or None.

    In short, the issue is affecting Peripheral Regions that is configured with 2GB Size, regardless of the Base Address.
    Take 4 designs as examples,

    • Design 1
    • 0x0 to 0xFFFF in 64KB Peripheral Region A will bypass cache.
    • 0x4000_0000 to 0x7FFF_FFFF in 1GB Peripheral Region B will bypass cache.

     

    • Design 2
    • 0x0 to 0x7FFF_FFFF in 2GB Peripheral Region A will NOT bypass cache. 2GB Size is bugged.
    • 0x8000_0000 to 0xBFFF_FFFF in 1GB Peripheral Region B will bypass cache.

     

    • Design 3
    • 0x4000_0000 to 0x7FFF_FFFF in 1GB Peripheral Region B will bypass cache.
    • 0x8000_0000 to 0xFFFF_FFFF in 2GB Peripheral Region B will NOT bypass cache. 2GB Size is bugged.

     

    • Design 4
    • 0x0 to 0x7FFF_FFFF in 2GB Peripheral Region A will NOT bypass cache. 2GB Size is bugged.
    • 0x8000_0000 to 0xFFFF_FFFF in 2GB Peripheral Region B will NOT bypass cache. 2GB Size is bugged.

     

    Regards,
    Liang Yu