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Altera_Forum
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21 years ago

NIOS SDRAM performance

I have measured the speed of memcpy's of NIOS2. I use optimized code consisting of four consecutive READs and four consecutive write accesses. Code snippet: while (i--) { d0 = __built...
Altera_Forum's avatar
Altera_Forum
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21 years ago

Dirk,

I've definitely found the dma to be the ultimate data mover as well.

While this is ok for some things, you can't for instance dma directly into registers when you need to manipulate data.

I guess a work around would be to dma small work packets into a small onchip ram. Sorta like a manual cache. Unless LDW on onchip ram has the same problem as it does when reading SDRAM.

Have you looked into the LD and ST to and from onchip?

Ken