Honored Contributor
Honored ContributorThe most I've ever done is create a counter that counts up to some value and stops. The counter starts at 0, and the external reset pin will reset the counter to 0. All other circuits on the Altera chip use a registered version of the counter's count enable signal for their reset.
This has the effect of holding the chip in reset for a certain amount of time after either the external reset is released, or the chip switches from configuration mode to user mode. The example designs for the various Altera Nios demo boards have a delayed-reset counter that does about the same thing; you could look at it. How long do you need to hold reset? I'm not sure; I usually aim for a few microseconds, but you may want longer if you need a PLL to stabilize, for example.
