Altera_Forum
Honored Contributor
20 years agonios performance
Hi all,
I have a piece of C-code which I have indicated below. { int idx_1, idx_2; for( idx_1 = 0; idx_1 < 6; idx_1++) { for(idx_2 = 0; idx_2 < 16; idx_2++) { p->a[idx_1][idx_2] = q->b[idx_1][idx_2]; } } } I ported the above code to NIOS-II/E no-cache processor. p is a hard coded pointer to a structure i.e struct xyz *p = 0x00040000; I performed verilog simulations on the above code. I found that I need 65 clock cycles between two consecutive writes. Isn't this too large for just memory transfers? Is something incorrect with what I'm doing? Thanks, Sridhar.