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Honored Contributor
Honored ContributorNios not responds, then FAILs, then pauses
intro: I am trying to instantiate a Nios II system on a Stratix I FPGA. The Nios takes in as input a clk and a reset signal, and outputs various signals through PIO. I am using on-chip memory to s...
Altera_ForumHonored Contributor
Honored ContributorIs you on-chip memory indeed at address 0x20000 ? Do you have any component with an avalon master that could overwrite that memory by mistake?
Does your Quartus project meet timing requirements? You need to look for critical warnings from Timequest.
