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Altera_Forum
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19 years ago

NIOS II/F With No JTAG

Hi all, I have a NIOS II/F design which has level 2 debug with JTAG UART. We want to remove it for various reasons now our production devices can load its own code from ROM. However, ...
Altera_Forum's avatar
Altera_Forum
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19 years ago

I have the same problem, I have a Nios processor and DDR interface inside a EP2C8Q208 chip and I would like to remove all unnecessary stuff to be able to speed up the processor to >85MHz to make it the same as the DDR clock.

Another thing is that the jtag_debug_module consumes two M4K blocks that I could use for processor cache.