NIOS II/f Maximum Frequency in Stratix II

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originally posted by rmorley78@Mar 21 2006, 08:07 AM

i&#39;m trying to get a nios ii/f with 4k instruction cache and 2k data cache to run at 125mhz. so far i&#39;ve had no success, the fastest i&#39;ve managed to get is 110mhz. i was wondering what the maximum frequency people have reached with nios ii in a stratix ii fpga? any suggestions would be helpful. http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/biggrin.gif

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Check out the "fast" example design under the Stratix II examples folder of your kit installation. Note that this is compiled to the (relatively slow) speed grade of 2S60 chips on our development boards.. by changing to the -3 (fastest) speed grade in Quartus the f-max will be even higher.

Also note that the fast design has several quartus compilation options turned on that increase compile time and f-max. I belive these are briefly discused in the top-level schematic for that design.

Finally, for squeezing the last bit of performance out you can try Quartus DSE (design space explorer) which basically iteratively compiles/fits the design to locate the best timing. The Altera website should inculde documentation (under the Quartus literature section) describing this tool.