Nios II with on-chip Dual port ram between Nios and External DSP

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If the Nios cpu (or other avalon master) is using a different clock then a clock crossing bridge will be added.

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Do You mean, that QSYS will add it automaticaly or should I add it manually?

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IMHO internal memory should always be tightly coupled to the nios cpu (unless you need the 2nd port for something else).

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Do You mean, that if 2nd port is controlled by my custom logic, then internal memory should not nessecary be tightly coupled to the nios cpu?