Nios II with on-chip Dual port ram between Nios and External DSP

You have to use a single clock and then enable OLD_DATA.

And still not do two writes to the same location.

Note that feeding the same clock to both clock inputs doesn't count - the M9K has to be configured with a single clock input.

If the Nios cpu (or other avalon master) is using a different clock then a clock crossing bridge will be added.

I mostly know about this because we had issues with the sopc builder silently ignoring OLD_DATA for M9K dual ported between the avalon bus and tightly coupled memory.

IMHO internal memory should always be tightly coupled to the nios cpu (unless you need the 2nd port for something else).