Forum Discussion
Nios II System download problem!
Hello everyone! I'm new to Altera's FPGAs and Nios soft cpu!
I got a DE2 board a few days ago from my university and I'm playing around with it to get to know it better! It has a Cyclon II device on it! I downloaded the following software from Altera's website: 1.quartus ii web edition software v9.1 Service Pack 1 2.[/B][/B]nios ii embedded design suite3.modelsim altera
I created a system with Nios II, a Jtag Uart interface, two parallel IO interfaces and an on-chip memory. I configured each component, i constrained the clock, I assigned the pins on the board and I compiled it successfully! Then I downloaded it to the board! Up till now everything seems to work perfectly! The problem arises when I try to compile and download my code for the Nios core to execute! I first used Altera Debug Client to compile and run my code (simple led control with switches) but I got the following message:
Writing "system.h" in "C:\Users\GeorgeK\Documents\QuartusProjects\sopc_builder_tut\app_software\include" directory...
Cannot find the Altera University Program IP Cores path from registry. You may need to manually the configure SDK usage.
Compiling source files...
nios2-elf-as --gstabs -I C:/altera/91sp1/nios2eds/components/altera_nios2/sdk/inc C:/Users/GeorgeK/Documents/QuartusProjects/sopc_builder_tut/app_software/lights.s -o C:/Users/GeorgeK/Documents/QuartusProjects/sopc_builder_tut/app_software/lights.s.o
/usr/bin/bash: nios2-elf-as: command not found
Linking...
nios2-elf-ld --defsym nasys_program_mem=0x1000 --defsym nasys_data_mem=0x1000 --section-start .exceptions=0x1020 --section-start .reset=0x1000 -e _start -u _start --script C:/altera/91sp1/nios2eds/bin/monitor/build/nios_as_build.ld -g -o C:/Users/GeorgeK/Documents/QuartusProjects/sopc_builder_tut/app_software/lights.elf C:/Users/GeorgeK/Documents/QuartusProjects/sopc_builder_tut/app_software/lights.s.o
/usr/bin/bash: nios2-elf-ld: command not found
Compilation stopped.Of course I have already configured system options (ptf file etc) and I tried it with assembly and C! Same problem arises for both! Next I try to use Nios II EDS Eclipse platform! I create a BSP project using the sopc info file wich was generated by SOPC earlier (in design time) in Quartus! Then I created a Nios Application project linked to the BSP I just created! I add a .c file to the project and I write my code in there! The code is the following: #define Switches (volatile char *) 0x0003000# define LEDs (char *) 0x0003010
void main()
{
while (1)
{
*LEDs = *Switches;
}
}
When I try to build the project I get an error that says something that the memory (the on chip memory I used) has to be larger! And it exits saying this:
Info: Linking RUN_ON_HDL_SIMULATOR_ONLY_Lights.elf
nios2-elf-g++ -T'../Lights_bsp//linker.x' -msys-crt0='../Lights_bsp//obj/HAL/src/crt0.o' -msys-lib=hal_bsp -L../Lights_bsp/ -msmallc -Wl,-Map=RUN_ON_HDL_SIMULATOR_ONLY_Lights.map -O0 -g -Wall -mno-hw-div -mno-hw-mul -mno-hw-mulx -o RUN_ON_HDL_SIMULATOR_ONLY_Lights.elf obj/lights.o -lm
/cygdrive/c/altera/91sp1/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: region onchip_memory2_0 is full (RUN_ON_HDL_SIMULATOR_ONLY_Lights.elf section .text). Region needs to be 3272 bytes larger.
/cygdrive/c/altera/91sp1/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: section .rodata overlaps section .text
/cygdrive/c/altera/91sp1/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: section .rwdata overlaps section .text
/cygdrive/c/altera/91sp1/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: section .bss overlaps section .text
collect2: ld returned 1 exit status
make: *** Error 1What can I do?!?!?!?!?!:confused: Is Eclipse IDE generating larger code than the Debug Client? The Debug Client seems a lot easier to use and is straightforward for tutorials and stuff! How can I get it to work!!?! ps: I also get this at the Eclipse platform error and stuff: ../Lights_bsp//libhal_bsp.a(alt_close.o)(.text+0x128): In function `alt_get_errno':
HAL/inc/sys/alt_errno.h:81: Unable to reach errno (at 0x00004024) from the global pointer (at 0x00010880) because the offset (-51292) is out of the allowed range, -32678 to 32767. I even made the on chip memory larger but nothing changed! Thank you all in advance for any help you may provide! Cheers, GeorgeK11 Replies
- Altera_Forum
Honored Contributor
Your design needs more on-chip memory. Try to increase the memory in your SOPC builder. Also you should see at the message how many memory your design needs!
- Altera_Forum
Honored Contributor
It says I need 3272 bytes more! I had 4KB in the beggining and I increased it to 16KB but still I get the errors! :(:(:(:(
Any ideas about the Altera Debug Client errors?! Thanx again for your time! I'll go out and when I come back I will check it out again! Cheers! - Altera_Forum
Honored Contributor
Gooooooooood! I redesigned everything from the beginning and I still have the same problems! I forgot to say I'm running Windows 7! I don't know if that poses any threat to the Altera Debug Client!
Is there any specific Java environment I need to run the Altera Debug Client? I have Java 6 Update 17! Heeeeeeeeeeelp!:( I'm stuck!! Thanx again! GeorgeK ps If any Altera programmer is listening pleeeeeeeease add the download feature to the Quartus software so we can download software to any Nios II project! :)! ps2 And also I'm using Nios II 9.1 Software Build Tools for Eclipse! - Altera_Forum
Honored Contributor
Aaaaaaaaaaaaaaaaaaaaa!!! I even tried the Nios 2 Shell but still I cant download even the simplest code to run on my Nios system!:) !!
Now I'm sure someone is playing a joke on me!:p!!! - Altera_Forum
Honored Contributor
It looks to me as though the 'linker script' being used isn't assigning all the program sections in the object files to appropriate addresses.
In addition the build system is including large tracts of code from libc that you just don't need for simple embedded code blocks. However the address overlaps you are seeing look like they are due to several object sections being given the same base address, not running off the end of the available memory area. - Altera_Forum
Honored Contributor
linker script?!
I still have the problem!! In a few days I will try everything on a Windows XP machine to see if I get any different results! Any other suggestion are welcome! - Altera_Forum
Honored Contributor
I tried everything again on an XP machine and I still get the same errors! Now we can be sure that it's not operating system related! I keep searching...!!
- Altera_Forum
Honored Contributor
Look at the error message again:
What is at 0x4000 and what is at 0x10000? Where are your reset address and exception address? Also, .rodata, .rwdata, .text? Reset is typically pointed to a non-volatile or onchip memory. Exception generally resides with the rest of your code. .rodata, .rwdata and .text are commonly pointed to the same memory. You might also try adding the -G0 (That's "-G<zero>) option during compilation. It could be that some small bits of data (.sdata, .sbss) are getting placed in the memory at 0x4000 or 0x10000, while the rest of your code resides in the opposite memory. Cheers, - slackeralt_errno.h:81: Unable to reach errno (at 0x00004024) from the global pointer (at 0x00010880) because the offset (-51292) is out of the allowed range, -32678 to 32767. - Altera_Forum
Honored Contributor
Thank you all again for your time and answers!!
In my system I use a Nios II/e, an on-chip memory, 2 parallel IO and a JTAG UART. When I insert the Nios Instance I can't select the exception and reset vectors, after I insert the on-chip memory the control are enabled and I select that memory for both the reset and exception vector with an offset of 0x20 between them so we end up with: Reset Vector: 0x00001000 Exception Vector: 0x00001020 The base addresses for the system are automatically selected (using the Auto-Assign Base Addresses feature of the SOPC Builder) and are the following: Nios II -> jtag_debug_module: 0x00002800 onchip_memory2_0: 0x00001000 Switches (PIO): 0x00003000 LEDs (PIO): 0x00003010 jtag_uart_0: 0x00003020 The clock is connected (50MHz) and so is the reset button! How can I check the addresses you mentioned above?! Also the attribute -G0 where is it supposed to be placed?! I added it while creating the project at the additional field but it produced an error! :(! Thanx again!:) EDIT: I tried the Altera Monitor Program too instead of the Debug Client which is older! Now I get an error and it stops compiling but it produces an elf file! When I download it it worked! Anyway I still can't use the Nios II IDE! What's going oooooooon!:confused::confused: - Altera_Forum
Honored Contributor
I have exactly the same problem. Did you find any solutions?
Thanks