Honored Contributor
Honored ContributorThank you all again for your time and answers!!
In my system I use a Nios II/e, an on-chip memory, 2 parallel IO and a JTAG UART. When I insert the Nios Instance I can't select the exception and reset vectors, after I insert the on-chip memory the control are enabled and I select that memory for both the reset and exception vector with an offset of 0x20 between them so we end up with: Reset Vector: 0x00001000 Exception Vector: 0x00001020 The base addresses for the system are automatically selected (using the Auto-Assign Base Addresses feature of the SOPC Builder) and are the following: Nios II -> jtag_debug_module: 0x00002800 onchip_memory2_0: 0x00001000 Switches (PIO): 0x00003000 LEDs (PIO): 0x00003010 jtag_uart_0: 0x00003020 The clock is connected (50MHz) and so is the reset button! How can I check the addresses you mentioned above?! Also the attribute -G0 where is it supposed to be placed?! I added it while creating the project at the additional field but it produced an error! :(! Thanx again!:) EDIT: I tried the Altera Monitor Program too instead of the Debug Client which is older! Now I get an error and it stops compiling but it produces an elf file! When I download it it worked! Anyway I still can't use the Nios II IDE! What's going oooooooon!:confused::confused:
