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Altera_Forum
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13 years ago

NIOS-II Response to External Interrupt

Hello Frined's, My Nios-ii System taking continuous interrupt at 1 mhz from external FPGA module with in same FPGA (Altera DE2_115 board), but when i forwarding this interrupt signal on anoth...
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Altera_Forum
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13 years ago

DMA - or at least a fifo that only requests an interrupt when it cintains a moderate amount of data.

You might manage that interrupt rate if it is your only interrupt source, and you handle it in assembler directly at the 'trap' address and using registers that don't have to be saved.

Anything like the jtag uart interrupt probably disables interrupts for longer than 100 clocks.