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Altera_Forum
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16 years ago

nios II processor not responding after high performance sdram controller addition

Hi all! I'm using the nios II v9.1 in my work and run my projects on the Cyclone III evalution board. It's allright if I use any design without sdram. But every time I add a high performance sdram...
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Altera_Forum
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16 years ago

Hi Kurbanov,

I dont know if you found the solution, but I got the same problem and I solved it. The solution is changing the name of the pin assingments.

ARCHITECTURE Structure OF teste1 IS

COMPONENT nios_system

PORT (

clk_0 : IN STD_LOGIC;

reset_n : IN STD_LOGIC;

out_port_from_the_LEDs : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);

in_port_to_the_Switches : IN STD_LOGIC_VECTOR (7 DOWNTO 0)

);

END COMPONENT;

BEGIN

-- Instantiate the Nios II system entity generated by the SOPC Builder

NiosII: nios_system PORT MAP (iCLK_50, iKEY(0), oLEDG, iSW);

The file DE2_70_pin_assignments has assingnmented in a diferent way of the altera example, they use CLOCK_50 that is different of iCLK_50 and others...

I hope it is usefull.