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Altera_Forum
Honored Contributor
Honored ContributorNios II processor modes
Hi, I want to control the nios ii processor and make different modes for it. like: sleep, standby, working.... so my first question: is it possible to do smth like this? if yes.. ...
Altera_ForumHonored Contributor
Honored ContributorIt is possible to gate the input clock in user vhdl, but that is likely to cause 'clock crossing bridges' to be added all over the place.
Most of the fpga is probably doesn't need continuous clocks, but any DRAM will need clocks (and regular refresh). It is also quite likely that any DRAM will need a special initialisation sequence when the clock starts.
