Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Nios II processor modes

Hi, I want to control the nios ii processor and make different modes for it. like: sleep, standby, working.... so my first question: is it possible to do smth like this? if yes.. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

It is possible to gate the input clock in user vhdl, but that is likely to cause 'clock crossing bridges' to be added all over the place.

Most of the fpga is probably doesn't need continuous clocks, but any DRAM will need clocks (and regular refresh). It is also quite likely that any DRAM will need a special initialisation sequence when the clock starts.