Honored Contributor
Honored ContributorIt seems that the Mico32 is rather large and slow compared to a Nios II.
Here's the stats from the Lattice web site: Performance and Resource Utilization for LatticeECP2/M Devices1: Configuration LUTs fMAX (MHz) Basic 1,571 98 Standard 1,816 116 Full 2,158 116 Three Configurations: * Basic o No Multiplier o Multicycle Shifter o No Cache * Standard o Multiplier o Pipelined Shifter o 8K I-Cache, No D-Cache * Full o Multiplier o Pipelined Shifter o 8K I-Cache, 8K D-Cache Their "Standard" version is about the size of a Nios II/f but the Nios II/f includes a data cache. The frequency of all cores is substantially slower than any of the Nios II cores. Maybe that is a property of the Lattice FPGAs? It would be interesting to get an apples to apples comparison to Nios II by implementing a Mico32 on an Altera device.
