Honored Contributor
Honored ContributorThe time stamp issue is not a problem, it's a feature. It's just telling you that the HW that you have loaded on your FPGA is older than what the software expects to see.
This means you have to, at a minimum, re-compile your FPGA design in Quartus II. You may also have to re-generate your system in SOPC Builder. Also, there is a checkbox option in the Run... dialog box which will enable you to download and run on hardware that is out-of-date. What do you mean you are unable to use the SW guide? You don't have a PDF viewer (acrobat reader)? Cheers, - slacker
