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4 Replies
- Altera_Forum
Honored Contributor
I need a example about FIFO--SDRAM by DMA with Verilog HDLtoo. Can some body help me ?
- Altera_Forum
Honored Contributor
Did anyone get any code?
- Altera_Forum
Honored Contributor
Recently I hava done a test project with FIFO and DMA, which transfer 6 different channel of data from FIFO to SDRAM on DE2-70 board.
If anyone still need this kind of example, email me. zhy8777#gmail.com - Altera_Forum
Honored Contributor
For FIFO to FIFO most people just use streaming and eliminate the DMA from the picture.