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Altera_Forum
Honored Contributor
Honored ContributorNIOS II DMA HAL
Anybody use the DMA HAL driver?
I need correct example for stream device and memory. I want receive from steram device through DMA(using HAL) and save stream data to memory. I have written worked code using DMA registers, but can't get right result for HAL. Studying of sourcel codes for HAL DMA indirectly specifies a mistake in HAL library, but I am not confident it.18 Replies
Altera_ForumThere was a bug in the HAL/DMA. This has been fixed and will be released very soon. I don't believe there is a workaround for it. I'll check.
- Altera_Forum
Will companies that have purchased the NIOS-II eval board/kit get notice
of any bug fixes/releases of NIOS-II? We plan on using HAL/DMA extensively for a project-in-progress. John - Altera_Forum
I'm sure you will get notice of updates. I will also post it here :-)
Marketing will be able to tell me if it will be a downloadable release. It looks too big right now from what I can tell. - Altera_Forum
If you are an active subscriber (meaning you purchased a Nios I/II kit less than a year ago or you purchased a Nios renewal and are still under active maintenance) then you will receive updates shipped to you automatically. We generally have 2 shipped releases per year, and 2-3 downloadable service pack releases.
Check for downloads here: nios i/ii service pack downloads (https://www.altera.com/support/software/download/service_packs/nios/upd-nios_index.jsp). Warning, please do not mistake Nios I service packs for Nios II ones. The next release is a service pack, scheduled to be available for download from www.altera.com by October 15th. - Altera_Forum--- Quote Start --- originally posted by major@Sep 7 2004, 10:35 PM anybody use the dma hal driver?
i need correct example for stream device and memory.
i want receive from steram device through dma(using hal) and save stream data to memory.
i have written worked code using dma registers, but can't get right result for hal.
studying of sourcel codes for hal dma indirectly specifies a mistake in hal library, but i am not confident it. --- Quote End --- Major. Have you looked at the example on page 4-21 of the Nios II Software Developer's Handbook, there is an example of exactly what you're trying to do and it works. If this does not answer your question then please post back. Lastly the bug that Kerri refers to is an edge case, and will not apply in the use case you have described. To explain the problem, it is important to understand the HAL DMA model. This expects a DMA device to be performing DMA transfers in one of three modes: - memory to memory - devices to memory - memory to device Which mode is used is expected to be determined at system creation time. In the case of the altera_avalon_dma driver, this is actually done through a run time ioctl call. The bug occurs if you have run the DMA in one of these modes, and then make the ioctl call to change to one of the other modes. This is in any case not an efficent way to make use of the DMA controller, since the pending transfer queues will need to be drained between the ioctl calls. It is better to provide additional DMA channels instead.
- Altera_Forum
<div class='quotetop'>QUOTE </div>
--- Quote Start --- Have you looked at the example on page 4-21 of the Nios II Software Developer's Handbook, there is an example of exactly what you're trying to do and it works. If this does not answer your question then please post back. Lastly the bug that Kerri refers to is an edge case, and will not apply in the use case you have described. To explain the problem, it is important to understand the HAL DMA model. This expects a DMA device to be performing DMA transfers in one of three modes: - memory to memory - devices to memory - memory to device Which mode is used is expected to be determined at system creation time. In the case of the altera_avalon_dma driver, this is actually done through a run time ioctl call. The bug occurs if you have run the DMA in one of these modes, and then make the ioctl call to change to one of the other modes. This is in any case not an efficent way to make use of the DMA controller, since the pending transfer queues will need to be drained between the ioctl calls. It is better to provide additional DMA channels instead.[/b] --- Quote End --- I use mode "devices to memory". I try use code on page 4-21. This code also does not work. 1. This code with small error: /* Wait for the transaction to complete */ while (!dma_done); - dma_done: void result function 2. I add to example IOCT request for RX_STREAM_ON with argumet = SPI_BASE address, before call alt_dma_rxchan_prepare. "Which mode is used is expected to be determined at system creation time" System created in "devices to memory": 1. DMA read_master connected ONLY to SPI control port 2. DMA write_master connected ONLY to SDRAM. This configuration work correctly through direct access to DMA registers, but don't work through HAL. This my worked code:
There can be you can result a correct code for HAL operations?IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_SPI_REC_BASE, 0); IOWR_ALTERA_AVALON_DMA_STATUS(DMA_SPI_REC_BASE, 0); IOWR_ALTERA_AVALON_DMA_RADDRESS(DMA_SPI_REC_BASE, SPIS_DATA_BASE); IOWR_ALTERA_AVALON_DMA_WADDRESS(DMA_SPI_REC_BASE, (alt_u32)buffer); IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_SPI_REC_BASE, DMA_BUFF_SIZE*2); ch = ALTERA_AVALON_DMA_CONTROL_HW_MSK | ALTERA_AVALON_DMA_CONTROL_GO_MSK | ALTERA_AVALON_DMA_CONTROL_LEEN_MSK | ALTERA_AVALON_DMA_CONTROL_RCON_MSK; IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_SPI_REC_BASE, ch); printf("Wait data...\n"); while(1){ ch = IORD_ALTERA_AVALON_DMA_STATUS(DMA_SPI_REC_BASE); if( ch & (~ALTERA_AVALON_DMA_STATUS_BUSY_MSK) ) { printf("DMA %d\n", ch); break; } } - Altera_Forum
Could you post the HAL code that's not working for you?
- Altera_Forum
TO_BE_DONE
- Altera_Forum
The use of transmit and receive in this context is a little confusing, since they have different meanings depending on whether you view things from outside or inside the DMA. The confusion is made worse by the fact that the documentation (and apparently the comments as well) are wrong in the 1.0 version of the Nios II kit.
Try using ALT_DMA_TX_STREAM_ON rather than ALT_DMA_RX_STREAM_ON. That should fix your problem. - Altera_Forum
Thanks. I try it check tomorrow and inform about result.
Yes, comments for alt_avalon_dma_launch_rxonly: <div class='quotetop'>QUOTE </div> --- Quote Start --- /* * alt_avalon_dma_launch_rxonly() is called to launch a new transaction when * only the receive channel is using incrementing addresses, * i.e. the transmit channel is accessing a single memory location (which is * probably a device register). */[/b] --- Quote End --- But in function code set DMA control flag RCON, and too(WCON) for alt_avalon_dma_launch_txonly. <div class='quotetop'>QUOTE </div> --- Quote Start --- The use of transmit and receive in this context is a little confusing, since they have different meanings depending on whether you view things from outside or inside the DMA.[/b] --- Quote End --- Receive or send DMA mode defined by connection WriteMaster and ReadMaster of the DMA channel (in current DMA opperation) and independet from view point (outside or inside the DMA).
