Forum Discussion
Honored ContributorNios II Debugger problem
When I try to debug the simple_socket_server app in Nios II SBT for Eclipse I get the following error:
.gdbinit: No such file or directory. Reading symbols from C:/NEEK_Qsys/Ethernet3/neek_ethernet_fred2_good50_Copy/software/NEEK_example_sss_flash/NEEK_example_sss_flash.elf...done. Stopped due to shared library event Can someone please explain what I am doing wrong?17 Replies
Altera_ForumHmm, so without the debugger your code does not reset? That is interesting... I'll try different debug levels and also removing the debugger on monday! :)
Thanks!- Altera_Forum--- Quote Start --- Hmm, so without the debugger your code does not reset? That is interesting... I'll try different debug levels and also removing the debugger on monday! :) --- Quote End --- Yes, my code runs fine without the debugger. This is a custom board on which I have the Cyclone III FPGA logic being booted from an EPCS16 and the Nios II code booting from external flash memory. I just got the whole thing up and running with the Interniche NicheStack running both telnet and FTP services, both of which are interfaces to an on-board SD Card socket. Quite a chore, I must say... Good luck with your system on Monday.
- Altera_Forum
karlxmar: I managed to get my code running by making sure that no segmentation faults were happening... easier said than done, as the chip would just reset without indicating where the fault actually occurred, thus I had to breakpoint/printf my way to the error source.
I don't know much about the debugger and I am sure there must be a way you are supposed to do it (perhaps something to do with the exception stack?), in which case I haven't found it yet! - Altera_Forum
IIRC you can enable a 'misaligned address trap' and also an 'invalid address trap' (these may be on the 'hidden' options menu though).
These should cause an exception (interrupt) be triggered if you access an illegal (enough) address. Writing an exception handler to save the info and report it to the host is a SMOP. Probably easier if you don't have any 'normal' interrupts. - Altera_Forum
I've seen this problem before using Qsys / Quartus 12.1 - the signal to the JTAG UART reset line should come only from the NIOS JTAG reset line. All other resets should be removed from that line.
- Altera_Forum
For the solution of this problem I removed project directories /db and /incremental_db. Close and restart Quartus II.
- Altera_Forum
For me the problem came up when i copied the project and changed the frequency of my CPU. The solution was to clean and rebuilt the QuartusII project!
