Nios II Burst Questions

The instruction master when bursting is set to 16 or 32 bytes per line will issue a burst starting at the offset on the cache line that cased the eviction. The data master always bursts on burst boundaries (start of the cache line). This property along with others like linewrapping bursts and always full bursting lets the tools know how to configure the burst adapter between CPU masters and the slave. For example if you created a sequential bursting master and hooked it up to a burst wrapping slave a burst adapter will be needed to handle chopping up the burst to avoid the wrapping conditions on the slave side (if bursts don't always start on burst boundaries). When the CPU instruction/data masters burst the linewrapping property is enabled for the instruction master and disabled for the data master. Likewise the instruction master always issues a max burst whereas the data master does not.

Back to your original post, if your caching component always issues bursts starting on a burst boundary then you can set the burstboundary condition to true. The only thing I have ever seen issue line wrapping bursts are processors so I guess use that to determine if your caching component needs to do the same. If your caching component will always do full bursts to the memory on the other side then you should probably enable the maxburst property. All these settings will impact the burst adapter between your caching component and the memories hooked up to it (if an adapter is necessary).