Forum Discussion
Hi Patrick,
Sorry for the delay in response, case came in while I was having offsite training. I'm Kian and I will be looking into this case. First of all, thanks for the initial analysis of the issue. I didn't see any attached picture ExceptionAssemblyCode.png but I could see the screenshot of the assembly code.
It sounds like a timing or racing condition as you mentioned enable the stack overflow debug logs and issue disappears or exception didn't happen.
If I understand correctly, the execution sequence is
i) altera_avalon_fifo_clear_event(0x610020, 0x08);
ii) altera_avalon_fifo_write_ienable(0x610020, 0x08);
and both of these are writing to the same register.
I saw in the assembly screenshot that indicates write_ienable first then clear event?
I will check on my end and what else I could dig out based on the information you provided.
Thanks
Regards
Kian