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Altera_Forum
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20 years ago

Nios II and separate WRITE_N signal to CFI Flash

Hi, It has been long time I played with Nios II, my first attempts were abandoned due to the project change. Now I am blessed with another project which would have a Nios II as a CPU candidate and...
Altera_Forum's avatar
Altera_Forum
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20 years ago

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originally posted by luca@Mar 13 2006, 12:29 PM

no bug:

if you specify shared you get a signal with the name of the bus,

if you specify not shared you get individual signal for each peripheral,

using both you get both

ptf manual editing is not reccomended if you are not familiar with it, anyway the modification will remain also after sopc generation and regeneration, unless you delete the component

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1. There is no option for CFI interface to share or not to share signals.

2. CFI interface signals seem to be always half-shared (read_n), half-not shared (write_n).

3. Problem does not appear when I use CFI flash and IDT71V416 predefined SRAM component interface for EP1C20 eval board.