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Altera_Forum
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20 years ago

Nios II and separate WRITE_N signal to CFI Flash

Hi, It has been long time I played with Nios II, my first attempts were abandoned due to the project change. Now I am blessed with another project which would have a Nios II as a CPU candidate and...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

I have asked that myself too ...

i finaly ended up with an and2 that connects to both nwrite signals (one from flash one from the other parts) and connects to the output port that leaves the fpga.

if you find a solution how to get rid of that additional write enable, please post it here.

Regards.

Michael