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Altera_Forum
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15 years ago

Nios-II Address Bus XXXXXXXX normal?

About 5 cycles after reset has gone inactive, the Nios-II CPU drives 'X's (yes they are true X's, which typically means two signals are driving each other) onto the address and byte enable buses. Thi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thanks for the reply Thormodo. The problem is showing up in simulation (so even before we're getting to the board). In the sim, the reset is going inactive prior to the rising edge and is 'stable' during the edge.