Forum Discussion

Icon for Honored Contributor rank

Honored Contributor

15 years ago

Nios-II Address Bus XXXXXXXX normal?

About 5 cycles after reset has gone inactive, the Nios-II CPU drives 'X's (yes they are true X's, which typically means two signals are driving each other) onto the address and byte enable buses. Thi...

Icon for Honored Contributor rank

Honored Contributor

15 years ago

Do you use a synchronized reset that is active for ~100ms (100 ms in order to make sure it reaches the entire board) ? I use the

http://datasheets.maxim-ic.com/en/ds/max823-max825z.pdf IC, combined with VHDL code to make it synchronized.

I use the NIOS II with Quartus 10.1 and I have no problems, but I'm no expert.