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Is it still necessary to synchronize them with the Nios clock before bringing them to the PIO?[/b]
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Yes, because the signal connected to the IRQ pin on your PIO must not change within the specified setup and hold times for the interrupt controller. As the frequency of interrupts increases, so does the probability of an asynchronous input violating these setup and hold times. A single d-type flip-flop per input should cure the problem (two, to be really sure).
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The other interrupt is from a standard Nios timer (so I would assume it is inherently synchronized).[/b]
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Yes, that's correct.