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Altera_Forum
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13 years ago

Nios doesn't boot using custom bootloader

Hi,

I have implemented the remote_update function on my custom board and it works for HW images.

Now I am trying to boot nios images from non standard offset but it does not work :-/.

I have read a lot of topics and use this method to change nios boot address in epcs: http://www.alterawiki.com/wiki/epcs_bootloaders.

I have programmed a jic in EPCS but only the HW image is loaded and I don't understand why.

I can load the nios from the Nios-IDE using "run as" but not from the EPCS. Maybe the .hex file I use is wrong ?

environment :

Cyclone IV GX / EPCS64 / Quartus 11.1 sp2

bootloader :

(http://www.alterawiki.com/wiki/epcs_bootloaders)

I compile the asm_bootloader with ‘make CODE_BASE=0x0’ command with those parameters:# define SOFTWARE_OFFSET 0x400000# define EPCS_FLASH_CONTROLLER_0_BASE 0x2000

Then I have copied my_boot_loader_standalone.hex in my quartus project.

sopc :

epcs_flash_controller_0:

- @=0x2000

boot_rom :

- 1024 bytes onchip rom

- User created init file: “my_boot_loader_standalone”

cpu:

- reset_vector and exception_vector mapped to boot_rom

jic generation:

elf2flash --epcs --input=$elf --output=sw.flash

nios2-elf-objcopy --input-target srec --output-target ihex sw.flash $hex_sw --change-addresses=0x400000

jic result:

BLOCK | START ADDRESS | END ADDRESS

Page_0 | 0x00000000 | 0x001673C7

nios.hex | 0x00400000 | 0x00408C4B

nios ide:

Allow_code_at_reset=’1’, other parameters are set to ‘0’

Thank for your help and advice.

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    --- Quote Start ---

    check epcs_flash_controller address and lock it to avoid any future modification. it must match EPCS_FLASH_CONTROLLER_0_BASE.

    1024 bytes for the ROM is enough.

    don't forget to initialize the ROM with "my_boot_loader_standalone.hex". Put this hex file in your project directory and point to it. (in sopc builder I write only "my_boot_loader_standalone" without any path or file extension in the "user created init file" field).

    set the processor reset vector to this boot rom.

    "this boot rom" is 1024 bytes for the ROM that is initialize with "my_boot_loader_standalone.hex"?

    "this boot rom" isn't epcs_flash.epcs_control_port? Reset vector isn't EPCS_FLASH_CONTROLLER_0_BASE?

    I'm working this,but my system can't boot from EPCS. The Quartus is 13.0,Cyclon v 5CGXFC5C6,my Exception vector memory is DDR3.

    Who can tell me this boot rom is what? on chip ram or epcs_flash.epcs_control_port? Reset vector is on chip ram' s address? or EPCS_FLASH_CONTROLLER_0_BASE?

    Thank you!

    --- Quote End ---

    My software can works,but the hardware can't works. I set the processor reset vector to on_chip_ram that is 262144 Bytes. My exception vector memory is the same with rest vector memory in on_chip_ram.Is the on_chip_ram is too small to put hardware? The follow is my jic map file.

    BLOCK START ADDRESS END ADDRESS

    Page_0 0x00000000 0x001DE686

    sw.hex 0x00800000 0x0081A37F

    When I set exception vector memory is on DDR3. My software and hardware can't work. Why ? I test DDR3 with Run AS hardware,it is normally.

    Thank you!