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Altera_Forum
Honored Contributor
12 years agoThe nios cpu will start fetching and executing code from its reset vector, it doesn't know (or care) whether the code makes any sense.
SDRAM contents only degrade without power, so can still be partially valid even if vcc is removed for a short time. For a production device you need to make absolutely sure that 'random' instructions aren't being executed - they might just interfere with the process that loads the actual code. I've not looked in detail about how the JTAG debugger load and executes code. IIRC it doesn't use the reset vector, so the reset vector probably ought to point to a tight loop.