Honored Contributor
Honored Contributordsl is right. The cores will start executing just after the SOF is loaded (ELF or no ELF) unless you make sure that they don't. This is actually what you want them to do. You just need to control how they behave. You could design all but one core to be held in reset. It would then be that one core's responsibility to take all of the other cores out of reset. You could have a single GPIO component with the outputs of the GPIO tied to each of the other core's resets. That GPIO could have a default value which would hold these core's in reset. Writing to the GPIO would release the core(s) from reset, but only when you want them to be released.
If you look at fullblown OSes (take Linux for example) this is essentially what they do as well. One core is responsible for bringing up most of the system and preparing the other cores for execution and then releasing them from reset and/or "idle" state and letting them do their thing. :-)
