Honored Contributor
Honored ContributorOur client is actually responsible for designing the FPGA image (which includes some custom IP in addition to the Nios core), so I'll have to speak to them about the possibility of using the NiosII.
It would mean rewriting a few things, but the NiosII seems to have a better instructions for IO with peripherals (8, 16 and 32 bit reads and writes), and as you point out, it only offers the flat register model (so presumbably the compiler is more thoroughly tested). The debugging support for the NiosII sounds a lot better too. Does the NiosII work with APEX devices? All the references I found on Altera's web site about NiosII only mentioned Stratix and Cyclone devices.
