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Altera_Forum
Honored Contributor
12 years agoNios cannot open/access EPSC
Custom Cyclone IV based board. Uses EPCS16 (ST 25P16) for AS configuration of FPGA. Board successfully configures from the EPCS and will then boot Nios, also from the EPCS. However, Nios cannot...
Altera_Forum
Honored Contributor
12 years agoI understand, although I'm a little disappointed at the lack of console messages in Eclipse whilst building the software. Other template applications clearly identify that they require more RAM than is specified in the .sopcinfo file. I'd have thought this would be easily identifiable during compilation.
I will resort to writing my own hdl implementing the commands required (rather than bit bashing). I do not need any form of read-modify-write. So, a simple bulk erase followed by the required page writes will suffice. No need for any large buffer to store a sector. Many thanks