Nios board couldn't work with SignaltapII

thanks BadOmen's answer, and i think i had found the key to settle the problem.

Some background: The Nios dev boards have a feature for implementing

and demonstrating remote reconfiguration of the Stratix/Cyclone

device. This is implemented by a single IO which is connected to the

board's MAX7128 configuration controller - if the FPGA asserts this

IO, the MAX device will follow the power-on configuration sequence in

an attempt to boot the FPGA with (presumably) a new FPGA configuration

stored in flash. However, if this pin is not used in your design, and

is not reserved as tri-stated, the pin could (and does) float to tell

the MAX device to perform re-configuration. ¡ª¡ª by Jesse.

so in normal times, if your project didn't have nios, u have to set all the unused pins as input & tri-state.

but when i use signaltapII ,this setting didn't work.

so i connect the pld_RECONFIGREQ_n pin to a vcc, that the FPGA wouldn't sent a reconfig require to CPLD.

luckly the signaltapII can work now!!!