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Altera_Forum
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11 years ago

Nios AvalonMM clock crossing bridge writes only 8 bits

Hi, I have a Nios II with the data master port (32 bit) connected to a Avalon-MM Clock Crossing Bridge to the CRA port of the PCIe core (in a Cyclone V), in Qsys. When I'm looking at the b...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Ah, yes. It seems that the IDE (Elcipse) doesn't generate a full 32 bit write on the Avalon bus, but generates 4 writes for each byte using the byte enables, when you manually change a value in the memory window.

Thanks !