Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
22 years ago

Nios 2 processor cores

We've just had our Nios 2 DKs installed. Since we are targeting a standard core to use in a Cyclone device, the software engineer asked if there were a way to not use the instruction bus cache a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
22 years ago

The ability to turn off either cache would be good for people like me who use the custom bus interface a lot. I end up setting my cache to the bare minimum since I end up bypassing it almost all the time.

As for instruction cache, I use to avoid it at all cost due to the fmax hit I'd take with NIOS I, now it seems fine to have it around (but being able to omit it would be nice since I have no clue if it's helping or hindering my design).