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Altera_Forum's avatar
Altera_Forum
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22 years ago

Nios 2 processor cores

We've just had our Nios 2 DKs installed. Since we are targeting a standard core to use in a Cyclone device, the software engineer asked if there were a way to not use the instruction bus cache a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
22 years ago

Are there any other changes that are scheduelled? Like being able to use the hardware divider in the 's' core for example (I tried modifying the settings file to enable the hardware divide for that core and it didn't seem to work (unless I did something wrong)).

Also James, besides the ability to disable the hardware multiplier circuit in the settings file (thanks for pointing that out with the 's' core fmax problems I was having), are there any other things that can be changed to get around the settings of the 3 fixed systems?