Open Side Menu
Skip to contentAltera Community
Forums
BlogKnowledge BaseAltera.com
RegisterSign In
  1. Altera Community
  2. Forums
  3. Nios® System

Forum Discussion

praveenkumar's avatar
praveenkumar
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

nios 2 dma with uart

can i transmit using uart and receive through dma in nios 2 embedded design any one help me with this

1 Reply

  • EricMunYew_C_Intel's avatar
    EricMunYew_C_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    you may refer to below:

    https://community.intel.com/t5/FPGA-Wiki/Modular-SGDMA/ta-p/735445


Recent Discussions

  • glenenglish's avatar
    HyperRAM Hyperbus options for Agilex
    Solved
    1 day ago
    glenenglish
  • ChandanHm6360's avatar
    Cyclone 10 GX Nios V Ethernet Ping Issue - UC/TCP-IP Error 20012 and TSE/mSGDMA Debugging ;
    4 days ago
    ChandanHm6360
  • watanabe's avatar
    Questions About GSFI, QSPI Flash XIP Boot, and HAL API Support
    5 days ago
    watanabe
  • sonycman's avatar
    Dual Port Nios V BSP error
    5 days ago
    sonycman
  • tul's avatar
    Mailbox Client HAL API: Erroneous behavior in flash erase boundary checks (Agilex 3 / Nios V)
    8 days ago
    tul
Contact Us
Altera YoutubeAltera YoutubeAltera Twitter
  • Company Overview
  • Newsroom
  • Our Leaders
  • Careers
Subscribe to Altera Newsletter

© Altera Corporation | Terms of Use | Privacy Policy | Cookies | Trademarks | PSIRT

Altera Logo