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GK4's avatar
GK4
Icon for New Contributor rankNew Contributor
7 years ago

Nios - control the cache

Scenario: Custom slave which uses waitrequest and bursts. Memory map: 0x200000 - 0x3FFFFF. I want to write 256 Bytes to the slave, it's a spi controller so the master (NIOS f) should write the data...
Ahmed_H_Intel1's avatar
Ahmed_H_Intel1
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi,

What I understood that you have two questions (correct me if I am wrong). First the memcpy works fine with all addresses but the 0XF00, plus you want to keep the memcpy moving data without interruption.

For the first question I will try to replicate this issue on a board I have and see why this happens.

For the second, I advise you to use the MSGDMA or any DMA IP (MM to MM). This will solve your problems and give the targeted results.

Here is a design example of the MSGDMA with a video link show you how to use it.

Design reference:

https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/multi-core-nios-ii-processors-reference-design-based-on-arria-10-soc-development-board/

Videos:

https://www.youtube.com/watch?v=GTKLU2UR3bA

https://www.youtube.com/watch?v=DUNAemGhUTE

Regards,

  • GK4's avatar
    GK4
    Icon for New Contributor rankNew Contributor
    7 years ago

    Yes I want to make memcpy without any interrupt. I haven't tried to see if signaltap or the debug component in the NIOS is causing the interrupts, but I made auto write enable to solve my problem, but if I reactivate this project, I will try the DMA solution and look if debugging components caused the interrupts.

    Regards,