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Altera_Forum
Honored Contributor
Honored Contributor*NEWBIE* User Logic
Hello, I created a very simple user logic. I takes the input, adds 1 to it and write it to the output. timescale 1ns / 100ps
module mytestmodule (
// inputs:
address,...
Altera_ForumHonored Contributor
Honored ContributorOK, I've included io.h to use IORD and IOWR. But now I need SYSTEM_BUS_WIDTH. Where can I find this?
