Newbie regarding NIOS - can I mix VHDL with NIOS in Cyclone III

if you have enough resources you can run Nios processor(s) and "user logic" (VHDL code)

you could approach the design in a number of ways. the easiest would be to instantiate an SOPC Builder/Qsys system into your VHDL code. the simplest way to interface a Nios to VHDL code would be a parallel I/O component

you could also design your VHDL with Avalon Memory Mapped and Streaming interfaces, and populate them within SOPC Builder/Qsys and interface directly with the Nios II processor