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Altera_Forum's avatar
Altera_Forum
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12 years ago

Newbie memory question

Hi, I got a Terasic DE0-nano board with a Cyclone IV FPGA. My design is writing data in the memory. I use a NIOS II softcore too and I'd like it to read the FPGA memory and the data I wrote in a h...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I think the different times are making the conversation difficult (I'm in France, you are in California, I think).

I have another question: my Qsys design is instantiating a dual-port memory. s2 is exported so the hardware part can control different signals to write on it. Now I want the cpu to read on the s1 port. How can the software access all the signals to read on a specific address?