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Altera_Forum
Honored Contributor
Honored ContributorNewbie memory question
Hi, I got a Terasic DE0-nano board with a Cyclone IV FPGA. My design is writing data in the memory. I use a NIOS II softcore too and I'd like it to read the FPGA memory and the data I wrote in a h...
Altera_ForumHonored Contributor
Honored ContributorThank you for all these explanations.
What I don't understand is the differences between Quartus II,Nios II, SOPC, QSys,... Wouldn't it be nice if the MegaWizard of Quartus II could create a microprocessor directly? Can I have a symbol for my processor to make it appear in my schematic top-level? Why have I to create an Avalon interface for the hardware part to communicate with the memory? Can't I create the memory with the MegaWizard in Quartus II and implement the signals directly in the hardware?
