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2. I want to know if there is anything slow down the handling of a 115200 baud uart.
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I understand that the non-FIFO UART receive does not work decently (loose characters) with more than some 2400 Baud.
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4. it is a interface to the remote update ip core. please read the data sheet and driver code to find out. I've tried it yet.
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I suppose you did not try it yet ?
I'll talk to Frank Storm about this and will try to find out if there is a way to enhance this to a secure way of updating the FPGA design and the Software via FTP. This will involve at least two copies of both in the flash and use a mechanism that starts a working one of them (the "old should work anyway, the "new" might be the result of a corrupted update).
The Cyclone III does handle this for the FPGA design by hardware, regarding the software the bootloader needs to do this.
So I suppose this needs a different boot loader but the "Application Selector".
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5
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Is this just another driver for the same hardware design ?
-Michael
Honored Contributor
