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Altera_Forum
Honored Contributor
20 years agoYou need one mutex per subsystem you wish to control access to. By "subsystem," I mean any set of peripherals which work together. It could be a single register, or a memory block, some UARTs, or whatever.
--- Quote Start --- originally posted by prasad_forums@Oct 21 2005, 07:54 AM means i want to have single mutex control for all the memoriesshared by the processors --- Quote End --- There you go; one mutex. This means that only one CPU can access any of the memories at a single time. Bear in mind that the Avalon Bus Module knows nothing of your mutexes. It's not going to put a CPU into wait states if that CPU decides to skip the mutex and use the memory directly.