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Altera_Forum
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15 years agoIn a multiprocessor system you will store each boot image at different memory offsets of the same flash device. For example:
processor 1 : boot from 0x00000 processor 2 : boot from 0x20000 processor 3 : boot from 0x40000 .... These addresses are those you specify when you generate the Nios core, namely the reset address in Nios II properties page. AFAIK all parallel flash memories (at least classic NOR devices) have a CFI. See for example Am29LV or M29W or S29GL devices.