Altera_ForumHonored Contributor15 years agoMultiprocessor using DE2-70 board Hello all, I want to design multiprocessor project using DE2-70(EP2C70F896C6N). I am getting pin assignment error as : Quartus II --------------------------- I/O Assignment Analysis was NO...Show More
Altera_ForumHonored Contributor15 years agohttp://www.alteraforum.com/forum/showthread.php?t=22866 http://www.alteraforum.com/forum/showthread.php?t=22702 http://www.alteraforum.com/forum/showthread.php?t=22969 http://www.alteraforum.com/forum/showthread.php?t=23483
Recent DiscussionsNIOS-V QSYS Warning Properties (associatedClock) have been set onSolvedDK-DEV-AGI027-RA: JTAG chain broken after Nios V Hello, FPGA recovery failsWhere is FreeRTOS-Plus-TCP DesignSolvedNIOS V: Systick based timeouts not available when using internal timerSolvedAshling RISC Free IDE fails to download ELF file