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Honored Contributor
Honored ContributorMultiple Nios II and Qsys
Hello, Is there anybody that used/have experience with Qsys to fit five Nios II on a Cyclone IV EP4CE22 FPGA? I could only fit one. I need to use SDRAM controller. I'd like to know how many...
Altera_ForumHonored Contributor
Honored ContributorHi,
I have my SDRAM at 0x80_0000. 1st Core: Reset Vector: 0x80_0000 Exception Vector: 0x80_0020 2nd Core: Reset Vector: 0x81_0000 Exception Vector: 0x81_0020 3rd Core: Reset Vector: 0x82_0000 Exception Vector: 0x82_0020 4th Core: Reset Vector: 0x83_0000 Exception Vector: 0x83_0020. Though when I run my 1st core, it runs & says "starting at address 0x80_0020". But when I run my 2nd core, it freezes the 1st core and itself runs in a weird way and says "starting at address 0x80_0000". Can anyone please suggest why 2nd core is starting to run at 0x80_0020. It should start at 0x81_0020.
